Showing posts with label discrete. Show all posts
Showing posts with label discrete. Show all posts
Sunday, March 24, 2013
Discrete Virtual Ground Circuit
Very useful add on for Single output power supply
Here is the simple virtual ground circuit based on discrete components. This simple design comes from miniaturization guru Sijosae. Is to make a buffer from generic discrete components. The transistors can be most any complementary pair of small-signal transistors. Suitable alternatives are the PN2222A and PN2907A. The diodes are generic small-signal types. An acceptable alternative is the 1N914. This circuit has better performance than a simple resistive divider virtual ground, and the parts cost is lower than for any other circuit mentioned here. It is, however, the least accurate of the buffered virtual ground circuits.
Circuit diagram:
Parts:
R1,R2 = 4.7K
R3,R4 = 4.7R
C1,C2 = 470uF-25V
C3,C4 = 47uF-25V
D1,D2 = 1N4148
Q1 = 2SC1384
Q2 = 2SA684
B1 = Battery
More...
Here is the simple virtual ground circuit based on discrete components. This simple design comes from miniaturization guru Sijosae. Is to make a buffer from generic discrete components. The transistors can be most any complementary pair of small-signal transistors. Suitable alternatives are the PN2222A and PN2907A. The diodes are generic small-signal types. An acceptable alternative is the 1N914. This circuit has better performance than a simple resistive divider virtual ground, and the parts cost is lower than for any other circuit mentioned here. It is, however, the least accurate of the buffered virtual ground circuits.
Circuit diagram:
Discrete Virtual Ground Circuit Diagram
Parts:
R1,R2 = 4.7K
R3,R4 = 4.7R
C1,C2 = 470uF-25V
C3,C4 = 47uF-25V
D1,D2 = 1N4148
Q1 = 2SC1384
Q2 = 2SA684
B1 = Battery
Monday, March 18, 2013
Discrete Voltage Inverter
The circuit in the diagram enables a negative voltage to be derived without the use of integrated circuits. Instead, it uses five n-p-n transistors that are driven by a 1 kHz (approx) TTL clock. When the clock input is high, transistors T1 and T2 link capacitor C1 to the supply voltage, UIN, which typically is 5 V. During this process, transistor T5 conducts so that T3 and T4 are off. When the clock input is low, T5 is cut off, whereupon transistors T3 and T4 are switched on via pull-up resistor R6 and either R4 or R5.
This results in the charge on C1 being shared between this capacitor and C2 Since the +ve terminal of C2 is at ground potential, its –ve terminal must become negative w.r.t. earth. The high level at the clock input must be of the same order as the positive input voltage, UIN, otherwise T1 cannot be switched on. The clock frequency should be around 1 kHz to ensure a duty cycle ratio of 1:1. Altering the ratio results in a different level of negative output voltage, but this is always smaller than that with a ratio of 1:1.
More...
This results in the charge on C1 being shared between this capacitor and C2 Since the +ve terminal of C2 is at ground potential, its –ve terminal must become negative w.r.t. earth. The high level at the clock input must be of the same order as the positive input voltage, UIN, otherwise T1 cannot be switched on. The clock frequency should be around 1 kHz to ensure a duty cycle ratio of 1:1. Altering the ratio results in a different level of negative output voltage, but this is always smaller than that with a ratio of 1:1.
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