Tuesday, March 26, 2013

Browse » home» » » » » Input Impedance Booster Circuit

Input Impedance Booster Circuit

The input resistance of a.c.-coupled op amp circuits depends almost entirely on the resistance with which the d.c. setting is determined. If CMOS op amps are used, the input resistance is normally high, currently up to 10 MΩ. If a higher value is needed, a bootstrap circuit may be used. This enables the input resistance to be boosted artificially to a very high value, indeed In the circuit shown in the diagram, resistor R1 sets the d.c. point for IC1a. The terminal of the resistor linked to pin 7 of IC1 would normally be at earth potential, so that the input impedance would be 10 MΩ. Connecting the other terminal of the resistor to earth via IC1a and network C2-R3-R2 as far as d.c. is concerned results in the requisite d.c. setting of the op amp.

Circuit diagram:

Input Impedance Booster II Circuit Diagram

As far as alternating voltages are concerned, the input signal is fed back so that only a tiny alternating current flows through R1. Therefore, Rin=R1[(R2+R3)/R3]. With resistor values as specified, Rin is about 1 GΩ. One aspect must be borne in mind: the numerical value of (R2+R3)/R3 must not exceed 0.99. This means that the value of R3 cannot be less than 100 kΩ if the value of R2 is 10 MΩ. If these conditions are not met, the circuit will become unstable.

Copyright: Elektor Electronics

No comments:

Post a Comment

Note: Only a member of this blog may post a comment.